Stanford Emerging Technology Review 2024: Semiconductors

When Stanford puts out an emerging technology review, it's worth turning off all notifications and digging into the details. Philip Wong’s overview of semiconductor tech is a stark reminder that the era of simple 2D silicon scaling is behind us. As physical gates shrink to the atomic scale, quantum effects and leakage make traditional density scaling impossible. Instead, the industry is pivoting toward vertical stacking—3D heterogeneous integration—and entirely new, advanced memory architectures to keep the wheels of computing moving.

For anyone building software at a startup, understanding these physical transitions is crucial for strategic planning. We are moving from a world where hardware was a generic commodity to a world where software must be co-designed with highly specific, non-uniform, 3D chip structures. If the physical structure of memory and compute is changing from flat planes to high-rise vertical architectures, then our database engines, algorithms, and distributed systems must evolve to exploit these physical shapes. The future belongs to builders who can bridge this gap between silicon geometry and software logic.

What stuck with me

• Going vertical (3D): As horizontal scaling hits atomic limits, performance gains are increasingly found by stacking components vertically through 3D heterogeneous integration.
• Co-design is mandatory: Software and hardware must be designed in tandem, as generic software can no longer exploit the specialized, non-uniform architectures of modern chips.
• Advanced memory integration: New memory architectures that reduce the physical distance between storage and computation are essential to bypass traditional bandwidth bottlenecks.